PEF20532

2 Channel Serial Optimized Communication Controller

Introduction TheSEROCCO-MisaSerialCommunicationControllerwithtwoindependentserialchannels1).TheserialchannelsarederivedfromupdatedprotocollogicoftheESCCandDSCC4devicefamilyprovidingalargesetofprotocolsupportandvarietyinserialinterfaceconfiguration.Thisa

PEF20534

DMA Supported Serial Communication Controller with 4 Channels

Overview TheDSCC4isaDMASupportedSerialCommunicationControllerwithfourindependentserialchannels1).TheserialchannelsarederivedfromupdatedprotocollogicoftheESCCdevicefamilyprovidingalargesetofprotocolsupportandvarietyinserialinterfaceconfiguration.Thisallows

PEF2054

ICs for Communications

Overview ThePEB2055(ExtendedPCMInterfaceController)isahighlyintegratedcontrollercircuitoptimizedforanalogandISDNlinecardandcentralswitchesapplications.TheEPIC-1providesthecircuitrynecessarytomanageupto32digital(ISDNorproprietary)or64analogsubscribers. Th

PEF20542

2 Channel Serial Optimized Communication Controller with DMA

Introduction TheSEROCCO-DisaDMAIntegratedSerialCommunicationControllerwithtwoindependentserialchannels1).TheserialchannelsarederivedfromupdatedprotocollogicoftheESCCandDSCC4devicefamilyprovidingalargesetofprotocolsupportandvarietyinserialinterfaceconfig

PEF2055

ICs for Communications

Overview ThePEB2055(ExtendedPCMInterfaceController)isahighlyintegratedcontrollercircuitoptimizedforanalogandISDNlinecardandcentralswitchesapplications.TheEPIC-1providesthecircuitrynecessarytomanageupto32digital(ISDNorproprietary)or64analogsubscribers. Th

PEF20550

ICs for Communications

Overview ThePEB20550(ExtendedLineCardController)isahighlyintegratedcontrollercircuitoptimizedforlinecardandkeysystemapplications.Itcombinesallfunctionalblocksnecessarytomanageupto32digital(ISDNorproprietary)or64analogsubscribers. Theswitchingandlayer-1c

PEF20570

DSP Embedded Line and Port Interface Controller

Addendumto“DELICClockSystemSynchronization” TheDELICClockSystemSynchronizationisdescribedintheDELIC-LCPEB20570/DELIC-PBPEB20571DataSheet,independentoftheversion(2.1..3.1). Asanaddendumtochapter“DELICClockSystemSynchronization”oftheDELICLC/DELIC-PBDataSheet

PEF20571

DSP Embedded Line and Port Interface Controller

Addendumto“DELICClockSystemSynchronization” TheDELICClockSystemSynchronizationisdescribedintheDELIC-LCPEB20570/DELIC-PBPEB20571DataSheet,independentoftheversion(2.1..3.1). Asanaddendumtochapter“DELICClockSystemSynchronization”oftheDELICLC/DELIC-PBDataSheet

PEF2080

S/T Bus Interface Circuit (SBC)

TheS-BusInterfaceCircuit(SBC)PEx2080implementsthefour-wireS/T-interfaceusedtolinkvoice/dataterminalstoanISDN.Throughselectionofoperatingmode,thedevicemaybeemployedinalltypesofapplicationsinvolvinganSinterface.TwoormoreSBC´scanbeusedtobuildapointto-p

PEF20954

Smart Integrated Digital Echo Canceller

Introduction TheSmartIntegratedDigitalEchoCanceller(SIDEC)suppressesechoesintelecommunicationnetworkswhichmightdisturbanykindofterrestrialorwirelesscommunication.ItincorporatesleadingedgeCMOStechnologyaswellasINFINEON’smanyyearsexperienceinTelecommunicationICs