PEEL18CV8中文资料CMOS Programmable Electrically Erasable Logic Device数据手册TI规格书

描述 Description

General Description
The PEEL18CV8 is a Programmable Electrically Erasable Logic (PEEL) device providing an attractive alternative to ordinary PLDs. The PEEL18CV8 offers the performance, lexibility, ease of design and production practicality neededy logic designers today.

特性 Features

■ Multiple Speed Power, Temperature Options
- VCC= 5 Volts ±10%
- Speeds ranging from 5ns to 25 ns
- Power as low as 37mA at 25MHz
- Commercial and industrial versions available
■ CMOS Electrically Erasable Technology
- Superior factory testing
- Reprogrammable in plastic package
- Reduces retrofit and development costs
■ Development / Programmer Support
- Third party software and programmers
- ICT PLACE Development Software and PDS-3 rogrammer
- PLD-to-PEEL JEDEC file translator
■ Application Versatility
- Replaces random logic
- Super sets PLDs (PAL, GAL, EPLD)
- Enhanced Architecture fits more logic than ordinary LDs