PDM41028LA12TSOA中文资料ETC数据手册PDF规格书

[Paradigm-Technology]

描述 Description

The PDM41028 is a high-performance CMOS static RAM organized as 262,144 x 4 bits. Writing to this device is accomplished when the write enable (WE) and the chip enable (CE) inputs are both LOW. Reading is accomplished when WE remains HIGH and CE and OE are both LOW.

特性 Features

□ High speed access times

Com’l: 10, 12 and 15 ns

Ind’l: 12 and 15 ns

□ Low power operation (typical)

- PDM41028SA

Active: 400 mW

Standby: 150 mW

- PDM41028LA

Active: 350 mW

Standby: 100 mW

□ Single +5V (±10) power supply

□ TTL-compatible inputs and outputs

□ Packages

Plastic SOJ (300 mil) - TSO

Plastic SOJ (400 mil) - SO