PCK2021中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The PCK2021 is a clock synthesizer/driver for a Pentium III and other similar processors.

The PCK2021 has six differential pair CPU current source outputs, two 33 MHz outputs, one 3V66 output, and two 48 MHz clocks which can be disabled on power-up, and one 3.3 V reference clock at 14.318 MHz which can also be disabled on power-up.

The part possesses a dedicated power-down input pin for power management control. This input is synchronized on chip, and ensures glitch-free output transitions. In addition, the part can be configured to disable the 48 MHz outputs for lower power operation and an increase in the performance of the functioning outputs. The REF and PCI outputs can also be disabled for the highest performance of the Host outputs.

FEATURES

• 3.3 V operation

• Six differential CPU clock pairs

• Two PCI clocks at 33 MHz and one 3V66 clock

• Two 48 MHz clocks at 3.3 V

• One 14.318 MHz reference clock

• Power management control pins

• Host clock jitter less than 200 ps cycle-to-cycle

• Host clock skew less than 150 ps pin-to-pin

• Spread Spectrum capability

• Optimized frequency and spread spectrum performance