PCF5083HSLASH001SLASHF2中文资料飞利浦数据手册PDF规格书

GENERAL DESCRIPTION

The PCF5083 GSM Signal Processing IC is a dedicated VLSI circuit; fabricated in a 0.5 µm CMOS process. It has been designed for baseband signal processing tasks for the Pan European Global System for Mobile telecommunication (GSM). The PCF5083 is part of the second generation Philips Semiconductors GSM chip set.

FEATURES

• Fabricated in a 0.5 µm CMOS process with 3-layer metal

• LQFP128 package (SOT420AA-2)

• 3.3 V operation

• Low power

• Embedded DSP core for all GSM specific signal processing tasks:

– 16-bit fixed point DSP

– 19.5 MHz or external clock operation

– Flexible power-down modes

– 5 kbyte on-chip program or data RAM

– 2 kbyte on-chip data ROM

– 16 kbyte on-chip program ROM

– Fully pre-programmed modules for GSM baseband tasks including all data channels

– Dedicated GSM signal processor with application specific hardware for: equalisation, channel encoding/decoding for all traffic and control channels and encryption/decryption (A5/1 and A5/2 algorithms)

– Tone and side-tone generation

• GSM Hardware Timer and Interface core:

– Power saving Sleep mode for GSM mobiles

– Programmable TDMA timing and power-down signals with 0.25 bit resolution

– Three wire serial control bus for fast programming of RF ICs and synthesizers

– IOM®-2 interface for external accessories, host software download and support of the Digital Audio Interface (DAI)

– RS232 interface for the man machine interface controller

– Man machine interface power-down control

– Power supply control logic with Watchdog Timer

– Real time clock and calendar running on 32.768 kHz

– 6-bit general purpose I/O port

• Reduced swing 13 MHz main clock input

• On-chip PLL to derive the DSP and microcontroller clock

• 8-bit, 68000 compatible host interface with three interrupt lines

• Boundary scan interface in accordance with “IEEE Standard 1149.1-1990”.