PCA9548APW集成电路（IC）的专用规格书PDF中文资料

General description

The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register.

An active LOW reset input allows the PCA9548A to recover from a situation where one of the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machine and causes all the channels to be deselected as does the internal Power-on reset function.

The pass gates of the switches are constructed such that the VDD pin can be used to limit the maximum high voltage which will be passed by the PCA9548A. This allows the use of different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 6 V tolerant.

Features and benefits

■ 1-of-8 bidirectional translating switches

■ I2C-bus interface logic; compatible with SMBus standards

■ Active LOW reset input

■ Three address pins allowing up to eight devices on the I2C-bus

■ Channel selection via I2C-bus, in any combination

■ Power-up with all switch channels deselected

■ Low Ron switches

■ Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses

■ No glitch on power-up

■ Supports hot insertion

■ Low standby current

■ Operating power supply voltage range of 2.3 V to 5.5 V

■ 6 V tolerant inputs

■ 0 Hz to 400 kHz clock frequency

■ ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per

JESD22-C101

■ Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

■ Three packages offered: SO24, TSSOP24, and HVQFN24