PCA9538PW中文资料8-bit I2C-bus and SMBus low power I/O port with interrupt and reset数据手册恩XP规格书

描述 Description

The PCA9538 is a 16-pin CMOS device that provides 8 bits of General Purpose parallel Input/Output (GPIO) expansion with interrupt and reset for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of II2CC-bus I/O expanders. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push-buttons, LEDs, fans, etc.
The PCA9538 consists of an 8-bit Configuration register (input or output selection), 8-bit Input Port register, 8-bit Output Port register and an 8-bit Polarity Inversion register (active HIGH or active LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input Port or Output Port register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.
The PCA9538 is identical to the PCA9554 except for the removal of the internal I/O pull-up resistor which greatly reduces power consumption when the I/Os are held LOW, replacement of A2 with RESET and different address range.
The PCA9538 open-drain interrupt output (INT) is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine. The RESET pin causes the same reset/initialization to occur without de-powering the device.
Two hardware pins (A0 and A1) vary the fixed I²C-bus address and allow up to four devices to share the same I2C-bus/SMBus.

特性 Features

• 8-bit I²C-bus GPIO with interrupt and reset
• Operating power supply voltage range of 2.3 V to 5.5 V (3.0 V to 5.5 Vfor PCA9538PW/Q900)
• 5 V tolerant I/Os
• Polarity Inversion register
• Active LOW interrupt output
• Active LOW reset input
• Low standby current
• Noise filter on SCL/SDA inputs
• No glitch on power-up
• Internal power-on reset
• 8 I/O pins which default to 8 inputs
• 0 Hz to 400 kHz clock frequency
• ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM perJESD22-C101
• Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
• Offered in three different packages: SO16, TSSOP16 and HVQFN16