PCA9534D中文资料8-bit I2C-bus and SMBus low power I/O port with interrupt数据手册恩XP规格书

描述 Description

The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
The PCA9534 consists of an 8-bit Configuration register (Input or Output selection); 8-bit Input register, 8-bit Output register and an 8-bit Polarity Inversion register (active HIGH or active LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master. Although pin-to-pin and I2C-bus address compatible with the PCF8574 series, software changes are required due to the enhancements and are discussed in Application Note AN469.
The PCA9534 is identical to the PCA9554 except for the removal of the internal I/O pull-up resistor which greatly reduces power consumption when the I/Os are held LOW.
The PCA9534 open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I2C-bus address and allow up to eight devices to share the same I2C-bus/SMBus.

特性 Features

• 8-bit I2C-bus GPIO
• Operating power supply voltage range of 2.3 V to 5.5 V
• 5 V tolerant I/Os
• Polarity Inversion register
• Active LOW interrupt output
• Low standby current
• Noise filter on SCL/SDA inputs
• No glitch on power-up
• Internal power-on reset
• 8 I/O pins which default to 8 inputs
• 0 Hz to 400 kHz clock frequency
• ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
• Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
• Offered in four different packages: SO16, TSSOP16, and HVQFN16 (4 x 4 x 0.85 mm and 3 x 3 x 0.85 mm versions)