PCA9512D集成电路（IC）的信号缓冲器、中继器、分离器规格书PDF中文资料

DESCRIPTION

The PCA9512 is a hot swappable I2C and SMBus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses and includes two dedicated supply voltage pins to provide level shifting between 3.3 V and 5 V systems while maintaining the best noise margin for each voltage level. Either pin may be powered with supply voltages ranging from 2.7 V to 5.5 V with no constraints on which supply voltage is higher. Control circuitry prevents the backplane from being connected to the card until a stop bit or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9512 provides bi-directional buffering, keeping the backplane and card capacitances isolated.

FEATURES

• Bi-directional buffer for SDA and SCL lines increases fanout and prevents SDA and SCL corruption during live board insertion and removal from multi-point backplane systems

• Compatible with I2C standard mode, I2C fast mode, and SMBus standards

• ∆V/∆t rise time accelerators on all SDA and SCL lines with ability to disable ∆V/∆t rise time accelerators through the ACC pin for lightly loaded systems

• 5 V to 3.3 V level translation with optimum noise margin

• High-impedance SDA, SCL pins for VCC or VCC2 = 0 V

• 1 V precharge on all SDA and SCL lines

• Supports clock stretching and multiple master arbitration/synchronization

• Operating power supply voltage range: 2.7 V to 5.5 V

• 5.5 V tolerant I/Os

• 0 kHz to 400 kHz clock frequency

• ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101

• Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA

• Packages offered: SO8, TSSOP8 (MSOP8)

APPLICATION

• cPCI, VME, AdvancedTCA cards and other multi-point backplane cards that are required to be inserted or removed from an operating system.