PCA6416AEV中文资料Low-voltage translating 16-bit I2C-bus/SMBus I/O expander数据手册恩XP规格书

描述 Description

The PCA6416A is a 16-bit general purpose I/O expander that provides remote I/Oexpansion for most microcontroller families via the I²C-bus interface.
NXP I/O expanders provide a simple solution when additional I/Os are needed whilekeeping interconnections to a minimum, for example, in battery-powered mobileapplications for interfacing to sensors, push buttons, keypad, etc. In addition to providinga flexible set of GPIOs, it simplifies interconnection of a processor running at one voltagelevel to I/O devices operating at a different (usually higher) voltage level. The PCA6416Ahas built-in level shifting feature that makes these devices extremely flexible in mixedsignal environments where communication between incompatible I/O voltages is required.Its wide VDD range of 1.65 V to 5.5 V on the dual power rail allows seamlesscommunications with next-generation low voltage microprocessors and microcontrollerson the interface side (SDA/SCL) and peripherals at a higher voltage on the port side.
There are two supply voltages for PCA6416A: VDD(I²C-bus) and VDD(P). VDD(I²C-bus)provides the supply voltage for the interface at the master side (for example, amicrocontroller) and the VDD(P) provides the supply for core circuits and Port P. Thebidirectional voltage level translation in the PCA6416A is provided through VDD(I²C-bus).VDD(I²C-bus) should be connected to the VDD of the external SCL/SDA lines. This indicatesthe VDD level of the I²C-bus to the PCA6416A. The voltage level on Port P of thePCA6416A is determined by the VDD(P).
The PCA6416A register set consists of four pairs of 8-bit Configuration, Input, Output, andPolarity Inversion registers.
At power-on, the I/Os are configured as inputs. However, the system master can enablethe I/Os as either inputs or outputs by writing to the I/O configuration bits. The data foreach input or output is kept in the corresponding input or output register. The polarity ofthe Input Port register can be inverted with the Polarity Inversion register, saving externallogic gates.
The system master can reset the PCA6416A in the event of a time-out or other improperoperation by asserting a LOW in the RESET input. The power-on reset puts the registersin their default state and initializes the I²C-bus/SMBus state machine. The RESET pincauses the same reset/initialization to occur without depowering the part.
The PCA6416A open-drain interrupt (INT) output is activated when any input state differsfrom its corresponding Input Port register state and is used to indicate to the systemmaster that an input state has changed.
INT can be connected to the interrupt input of a microcontroller. By sending an interruptsignal on this line, the remote I/O can inform the microcontroller if there is incoming dataon its ports without having to communicate via the I²C-bus. Thus, the PCA6416A canremain a simple slave device.
The device Port P outputs have 25 mA sink capabilities for directly driving LEDs whileconsuming low device current.
One hardware pin (ADDR) can be used to program and vary the fixed I²C-bus addressand allow up to two devices to share the same I²C-bus or SMBus.

特性 Features

I²C-bus to parallel port expander
Operating power supply voltage range of 1.65 V to 5.5 V
Allows bidirectional voltage-level translation and GPIO expansion between:1.8 V SCL/SDA and 1.8 V, 2.5 V, 3.3 V or 5 V Port P
2.5 V SCL/SDA and 1.8 V, 2.5 V, 3.3 V or 5 V Port P
3.3 V SCL/SDA and 1.8 V, 2.5 V, 3.3 V or 5 V Port P
5 V SCL/SDA and 1.8 V, 2.5 V, 3.3 V or 5 V Port P
Low standby current consumption:1.5 μA typical at 5 V VDD
1.0 μA typical at 3.3 V VDD
Schmitt-trigger action allows slow input transition and better switching noise immunityat the SCL and SDA inputs:Vhys = 0.18 V (typical) at 1.8 V
Vhys = 0.25 V (typical) at 2.5 V
Vhys = 0.33 V (typical) at 3.3 V
Vhys = 0.5 V (typical) at 5 V
5 V tolerant I/O ports
Active LOW reset input (RESET)
Open-drain active LOW interrupt output (INT)
400 kHz Fast-mode I²C-bus
Input/Output Configuration register
Polarity Inversion register
Internal power-on reset
Power-up with all channels configured as inputs
No glitch on power-up
Noise filter on SCL/SDA inputs
Latched outputs with 25 mA drive maximum capability for directly driving LEDs
Latch-up performance exceeds 100 mA per JESD 78, Class II
ESD protection exceeds JESD 22:2000 V Human-Body Model (A114-A)
1000 V Charged-Device Model (C101)
Packages offered: TSSOP24, HWQFN24, VFBGA24