P89LPC920FDH中文资料飞利浦数据手册PDF规格书

General description

The P89LPC920/921/922 are single-chip microcontrollers designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The P89LPC920/921/922 is based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC920/921/922 in order to reduce component count, board space, and system cost.

Features

2.1 Principal features

■2 kB/4 kB/8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page size, and single byte erase.

■256-byte RAM data memory.

■Two 16-bit counter/timers. Each timer may be configured to toggle a port output upon timer overflow or to become a PWM output.

■Real-Time clock that can also be used as a system timer.

■Two analog comparators with selectable inputs and reference source.

■Enhanced UART with fractional baud rate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities.

■400 kHz byte-wide I2C-bus communication port.

■Configurable on-chip oscillator with frequency range and RC oscillator options (selected by user programmed Flash configuration bits). The RC oscillator option allows operation without external oscillator components. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 12 MHz. The RC oscillator option is selectable and fine tunable.

■2.4 V to 3.6 V VDDoperating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).

■15 I/O pins minimum. Up to 18 I/O pins while using on-chip oscillator and reset options.

2.2 Additional features

■20-pin TSSOP and DIP packages.

■A high performance 80C51 CPU provides instruction cycle times of 167 ns to 333 ns for all instructions except multiply and divide when executing at 12 MHz. This is 6 times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power

savings and reduced EMI.

■In-Application Programming of the Flash code memory. This allows changing the code in a running application.

■Serial Flash programming allows simple in-circuit production coding. Flash security bits prevent reading of sensitive application programs.

■Watchdog timer with separate on-chip oscillator, requiring no external components. The watchdog prescaler is selectable from 8 values.

■Low voltage reset (Brownout detect) allows a graceful system shutdown when power fails. May optionally be configured as an interrupt.

■Idle and two different Power-down reduced power modes. Improved wake-up from Power-down mode (a low interrupt input starts execution). Typical Power-down current is 1µA (total Power-down with voltage comparators disabled).