P89LPC913FDH中文资料恩智浦数据手册PDF规格书

General description

The P89LPC912/913/914 are single-chip microcontrollers in low-cost 14-pin packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC912/913/914 in order to reduce component count, board space, and system cost.

Features

Principal features

■ 1 kB byte-erasable flash code memory organized into 256 B sectors and 16 B pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.

■ 128 B RAM data memory.

■ Two 16-bit counter/timers. Each timer may be configured to toggle a port output upon timer overflow or to become a PWM output.

■ 23-bit system timer that can also be used as a RTC.

■ Two analog comparators with selectable inputs and reference source.

■ Enhanced UART with fractional baud rate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities (P89LPC913, P89LPC914).

■ SPI communication port.

■ Internal RC oscillator (factory calibrated to ±1 ) option allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.

■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).

■ Up to 12 I/O pins when using internal oscillator and reset options.