P87C51RD2BA数据手册恩XP中文资料规格书

描述 Description

OverviewThe devices are Single-Chip 8-Bit Microcontrollers manufactured in an advanced CMOS process and are derivatives of the 80C51 microcontroller family. The instruction set is 100% compatible with the 80C51 instruction set.
The devices support 6-clock/12-clock mode selection by programming an OTP bit (OX2) using parallel programming. In addition, an SFR bit (X2) in the clock control register (CKCON) also selects between 6-clock/12-clock mode.
The devices also have four 8-bit I/O ports, three 16-bit timer/event counters, a multi-source, four-priority-level, nested interrupt structure, an enhanced UART and on-chip oscillator and timing circuits.
The added features of the P87C51RA2/RB2/RC2/RD2 make it a powerful microcontroller for applications that require pulse width modulation, high-speed I/O and up/down counting capabilities such as motor control.

特性 Features

•80C51 Central Processing Unit
•8 kbytes OTP (87C51RA2)

•16 kbytes OTP (87C51RB2)

•32 kbytes OTP (87C51RC2)

•64 kbytes OTP (87C51RD2)

•512 byte RAM (87C51RA2/RB2/RC2)

•1 kbyte RAM (87C51RD2)

•Boolean processor

•Fully static operation

•Low voltage (2.7 V to 5.5 V at 16 MHz) operation




•12-clock operation with selectable 6-clock operation (via software or via parallel programmer)

•Memory addressing capability
•Up to 64 kbytes ROM and 64 kbytes RAM




•Power control modes:
•Clock can be stopped and resumed

•Idle mode

•Power-down mode




•CMOS and TTL compatible

•Two speed ranges at V CC = 5 V
•0 to 30 MHz with 6-clock operation

•0 to 33 MHz with 12-clock operation




•Parallel programming with 87C51 compatible hardware interface to programmer

•RAM expandable externally to 64 kbytes

•Programmable Counter Array (PCA)
•PWM

•Capture/compare




•PLCC, LQFP, or DIP package

•Extended temperature ranges

•Dual Data Pointers

•Security bits (3 bits)

•Encryption array - 64 bytes

•Seven interrupt sources

•4 interrupt priority levels

•Four 8-bit I/O ports

•Full-duplex enhanced UART
•Framing error detection

•Automatic address recognition




•Three 16-bit timers/counters T0, T1 (standard 80C51) and additional T2 (capture and compare)

•Programmable clock-out pin

•Asynchronous port reset

•Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock mode)

•Wake-up from Power Down by an external interrupt