OPA683中文资料具有禁用功能的极低功耗电流反馈放大器数据手册TI规格书

描述 Description

The OPA683 provides a new level of performance in very low-power, wideband, current feedback amplifiers. This CFBplus amplifier is among the first to use an internally closed-loop input buffer stage that enhances performance significantly over earlier low-power CFB amplifiers. While retaining the benefits of very low power operation, this new architecture provides many of the advantages of a more ideal CFB amplifier. The closed-loop input stage buffer gives a very low and linearized impedance path at the inverting input to sense the feedback error current. This improved inverting input impedance gives exceptional bandwidth retention to much higher gains and improved harmonic distortion over earlier solutions limited by inverting input linearity. Beyond simple high gain applications, the OPA683 CFBplus amplifier can allow the gain setting element to be set with considerable freedom from amplifier bandwidth interaction. This allows frequency response peaking elements to be added, multiple input inverting summing circuits to have greater bandwidth, and low-power line drivers to meet the demanding requirements of studio cameras and broadcast video.
The output capability for the OPA683 also sets a new mark in performance for very low-power current feedback amplifiers. Delivering a full ±4Vp-p swing on ±5V supplies, the OPA683 also has the output current to support this swing into a 100 load. This minimal output headroom requirement is complemented by a similar 1.2V input stage headroom giving exceptional capability for single +5V operation.
The OPA683’s low 0.94mA supply current is precisely trimmed at 25°C. This trim, along with low shift over temperature and supply voltage, gives a very robust design over a wide range of operating conditions. System power may be further reduced by using the optional disable control pin. Leaving this disable pin open, or holding it HIGH, gives normal operation. If pulled LOW, the OPA683 supply current drops to less than 100µA while the I/O pins go to a high impedance state.

特性 Features

• REDUCED BANDWIDTH CHANGE VERSUS GAIN
• 150MHz BANDWIDTH G = +2
• > 90MHz BANDWIDTH TO GAIN > +10
• LOW DISTORTION: