OMAP3503-HIREL中文资料应用处理器数据手册TI规格书

描述 Description

OMAP3503 high-performance, applications processor is based on the enhanced OMAP™ 3 architecture.
The OMAP™ 3 architecture is designed to provide best-in-class video, image, and graphics processing sufficient to support the following:
Streaming video 3D mobile gaming Video conferencing High-resolution still image The device supports high-level operating systems (OSs), such as:
Linux Windows CE This OMAP device includes state-of-the-art power-management techniques required for high-performance mobile products.
The following subsystems are part of the device:
Microprocessor unit (MPU) subsystem based on the ARM Cortex™-A8 microprocessor Camera image signal processor (ISP) that supports multiple formats and interfacing options connected to a wide variety of image sensors Display subsystem with a wide variety of features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out. Level 3 (L3) and level 4 (L4) interconnects that provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals The device also offers:
A comprehensive power and clock-management scheme that enables high-performance, low-power operation, and ultralow-power standby features. The device also supports SmartReflex™ adaptative voltage control. This power management technique for automatic control of the operating voltage of a module reduces the active power consumption. Memory stacking feature using the package-on-package (POP) implementation (CBB and CBC packages only) OMAP3503 is available in a 515-pin s-PBGA package (CBB suffix), 515-pin s-PBGA package (CBC suffix), and a 423-pin s-PBGA package (CUS suffix). Some features of the CBB and CBC packages are not available in the CUS package.
Table 1-1 lists the differences between the CBB, CBC, and CUS packages.
This OMAP3503 Applications Processor data manual presents the electrical and mechanical specifications for the OMAP3503 Applications Processor. The information contained in this data manual applies to both the commercial and extended temperature versions of the OMAP3503 Applications Processor unless otherwise indicated. It consists of the following sections:
A description of the OMAP3503 terminals: assignment, electrical characteristics, multiplexing, and functional description (Section 2) A presentation of the electrical characteristics requirements: power domains, operating conditions, power consumption, and dc characteristics (Section 3) The clock specifications: input and output clocks, DPLL and DLL (Section 4) The video DAC specification (Section 5) The timing requirements and switching characteristics (ac timings) of the interfaces (Section 6) A description of thermal characteristics, device nomenclature, and mechanical data about the available packaging (Section 7)

特性 Features

• OMAP3503 Applications Processor:
• MPU Subsystem
• NEON™ SIMD Coprocessor
• Commercial and Extended Temperature Grades
• Thumb®-2
• In-Order, Dual-Issue, Superscalar Microprocessor Core
• Over 2x Performance of ARMv6 SIMD
• Jazelle® RCT Execution Environment Architecture
• Embedded Trace Macrocell (ETM) Support for Non-Invasive Debug
• K-Byte Data Cache (4-Way Set-Associative)
• 112K-Byte ROM
• Endianess:
• ARM Data – Configurable
• Interfaces to Low-Power Double Data Rate (LPDDR) SDRAM
• SDRAM Controller (SDRC)
• Interfaces to Low-Power Double Data Rate (LPDDR) SDRAM
• General Purpose Memory Controller (GPMC)
• Up to 8 Chip Select Pins With 128M-Byte Address Space per Chip Select Pin
• Flexible Asynchronous Protocol Control for Interface to Custom Logic (FPGA, CPLD, ASICs, etc.)
• System Direct Memory Access (sDMA) Controller (32 Logical Channels With Configurable Priority)
• Memory Data Input
• BT.601/BT.656 Digital YCbCr 4:2:2 (8-/10-Bit) Interface
• Preview Engine for Real-Time Image Processing
• Histogram Module/Auto-Exposure, Auto-White Balance, and Auto-Focus Engine
• Separate Horizontal/Vertical Control
• Display Subsystem
• HD Maximum Resolution
• Support for Remote Frame Buffer Interface (RFBI) LCD Panels
• Luma/Chroma Separate Video (S-Video)
• Resize Images From 1/4x to 8x
• 8-bit Alpha Blending
• 5K-Byte Transmit/Receive Buffer (McBSP2)
• Direct Interface to I2S and PCM Device and TDM Buses
• Four Master/Slave Multichannel Serial Port Interface (McSPI) Ports
• High-Speed/Full-Speed/Low-Speed Multiport USB Host Subsystem
• Supports Transceiverless Link Logic (TLL)
• Three UARTs (One with Infrared Data Association [IrDA] and Consumer Infrared [CIR] Modes)
• Removable Media Interfaces:
• Comprehensive Power, Reset, and Clock Management
• Dynamic Voltage and Frequency Scaling (DVFS)
• Embedded Trace Macro Interface (ETM)
• 12 32-bit General Purpose Timers
• 1 32-bit 32-kHz Sync Timer
• 65-nm CMOS Technology
• Discrete Memory Interface (Not Available in CBC Package)
• 515-pin s-PBGA package (CBC Suffix), .65mm Ball Pitch (Top),.5mm Ball Pitch (Bottom)
• 1.8-V I/O and 3.0-V (MMC1 only), 0.985-V to 1.35-V Adaptive Processor Core Voltage 0.985-V to 1.35-V Adaptive Core Logic Voltage Note: These are default Operating Performance Point (OPP) voltages and could be optimized to lower values using SmartReflex™ AVS.
• Portable Media Player
• Digital TV
• Portable Data Collection
• Gaming
• Smart White Goods
• Ultra Mobile Devices

HiRel currently offers only CBC package.For CBB and CUS packages please contact TI sales. OMAP is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.