NXU0104PW-Q100中文资料安世数据手册PDF规格书

1. General description

The NXU0104-Q100 is a 4-bit, dual-supply level

translating buffer with Schmitt-trigger inputs and 3-

state outputs. It features four data inputs (An), four

data outputs (YBn) and an output enable input (OE).

Both VCCA and VCCB can be supplied at any voltage

between 0.9 V and 5.5 V making the device suitable

for translating between any of the voltage nodes (1.2 V,

1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V).

This device facilitates asynchronous communication

between data buses. Transmit data with a fixed

direction (unidirectionally) from the A bus to the B bus

on four channels. The OE pin can be referenced to

VCCA and VCCB domain and when OE pin is set LOW

the output is disabled and enter a high-impedance

OFF-state which isolates the buses. The OE pin can

be left floating or externally pulled down to ground to

ensure the high-impedance state of the output during

power up or power down.

This device ensures low static and dynamic power

consumption across the entire supply range and is

fully specified for partial power down applications using

IOFF. The IOFF circuitry prevents potentially damaging

backflow current through the device when it is powered

down or if one of the power supplies is disconnected

(floating).

No power supply sequencing is required and output

glitches during power supply transitions are prevented.

As a result, glitches will not appear on the output for

supply transitions during power-up/down.

This product has been qualified to the Automotive

Electronics Council (AEC) standard Q100 (Grade 1)

and is suitable for use in automotive applications.

2. Features and benefits

• Automotive product qualification in accordance with

AEC-Q100 (Grade 1)

• Specified from -40 °C to +85 °C and from

-40 °C to +125 °C

• Wide supply voltage range:

• VCCA: 0.9 V to 5.5 V

• VCCB: 0.9 V to 5.5 V

• Low power consumption for supply voltage range

1.1 V to 5.5 V

• 3 μA (Tamb = 25 °C)

• 5 μA (Tamb = -40 °C to +125 °C)

• Schmitt-trigger inputs with integrated static high

ohmic pull-down resistor on the input

• Maximum data rates:

• 250 Mbps (≥ 1.8 V to 5 V translation)

• Output enable (OE) allows connection to VCCA or

VCCB domain

• Suspend mode when either one of the supply

voltages is below 100 mV or disconnected (floating)

• Low noise overshoot and undershoot <10% of

VCCO

• IOFF circuitry provides partial power-down mode

operation

• Latch-up performance exceeds 100 mA per

JESD78D Class II

• Complies with JEDEC standard:

• JESD8-12 (0.9 V to 1.3 V)

• JESD8-11 (1.4 V to 1.6 V)

• JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8C (2.7 V to 3.6 V)

• JESD12-6 (4.5 V to 5.5 V)

• ESD protection:

• HBM: ANSI/ESDA/JEDEC JS-001 class 2

exceeds 2500 V

• CDM: ANSI/ESDA/JEDEC JS-002 class C3

exceeds 1500 V

• Similar functions: NXU0204-Q100 and

NXU0304-Q100

• DHVQFN package with Side-Wettable Flanks

enabling Automated Optical Inspection (AOI) of

solder joints

3. Applications

• General purpose I/O level translation

• Noisy environments or slow input signals

• Supports push-pull voltage translation as UART, SPI and JTAG protocols

• Consumer