NT256S64V8HC0G中文资料etc未分类制造商数据手册PDF规格书

[Nanya]

Description

NT256S64V8HC0G is unbuffered 168-pin Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which is organized as 32Mx64 high-speed memory arrays and is configured as two 16M x 64 physical bank. The DIMM uses sixteen 16Mx8 SDRAMs in 400mil TSOP II pack-ages. The DIMM achieves high-speed data transfer rates of up to 133MHz by employing a prefetch / pipeline hybrid architecture that supports the JEDEC 1N rule while allowing very low burst power.

Features

● 168-Pin Unbuffered 8-Byte Dual In-Line Memory Module

● Intended for PC133 applications

- Clock Frequency: 133MHz

- Clock Cycle: 7.5ns

- Clock Assess Time: 5.4ns

● Inputs and outputs are LVTTL (3.3V) compatible

● Single 3.3V ± 0.3V Power Supply

● Single Pulsed RAS interface

● SDRAMs have 4 internal banks

● Module has 2 physical bank

● Fully Synchronous to positive Clock Edge

● Data Mask for Byte Read/Write control

● Auto Refresh (CBR) and Self Refresh

● Automatic and controlled Precharge commands

● Programmable Operation:

- CAS Latency: 2, 3

- Burst Type: Sequential or Interleave

- Burst Length: 1, 2, 4, 8

- Operation: Burst Read and Write or Multiple Burst Read with Single Write

● Suspend Mode and Power Down Mode

● 4096 Refresh cycles distributed across 64ms

● Gold contacts

● SDRAMs in TSOP Type II Package

● Serial Presence Detect with Write Protect