2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

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2K-Bit Standard 2-Wire Bus Interface

ONSEMI

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2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

仙童半导体

2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

仙童半导体

2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

仙童半导体

2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

仙童半导体

2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

仙童半导体

2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

仙童半导体

2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

仙童半导体

2K-Bit Standard 2-Wire Bus Interface

General Description The NM34C02 is 2048 bits of CMOS non-volatile electrically erasable memory. It is designed to support Serial Presence Detect circuitry in memory modules. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for

文件：90.28 Kbytes 页数：12 Pages

Fairchild

仙童半导体