NM1200中文资料新唐科技数据手册PDF规格书

GENERAL DESCRIPTION

The NuMicro® NM1200/NM1100 series 32-bit microcontroller is embedded with ARM® Cortex® -

M0 core for industrial control and applications which require high performance, high integration,

and low cost. The Cortex® -M0 is the newest ARM® embedded processor with 32-bit performance

at a cost equivalent to the traditional 8-bit microcontroller.

The NM1200/NM1100 series can run up to 48 MHz and operate at 2.1V ~ 5.5V, -40℃ ~ 105℃,

and thus can afford to support a variety of industrial control and applications which need high

CPU performance. The NM1200/NM1100 series offers 17.5K-bytes embedded program flash,

size configurable Data Flash (shared with program flash), 2K-byte flash for the ISP, and 2K-byte

SRAM.

Many system level peripheral functions, such as I/O Port, Timer, UART, SPI, I2C, PWM, ADC,

Watchdog Timer, Analog Comparator and Brown-out Detector, have been incorporated into the

NM1200/NM1100 series in order to reduce component count, board space and system cost.

These useful functions make the NM1200/NM1100 series powerful for a wide range of

applications.

Additionally, the NM1200/NM1100 series is equipped with ISP (In-System Programming) and ICP

(In-Circuit Programming) functions, which allow the user to update the program memory without

removing the chip from the actual end product. The NM1200/NM1100 series also supports In-

Application-Programming (IAP) function, user switches the code executing without the chip reset

after the embedded flash updated.

FEATURES

 Core

 ARM® Cortex® -M0 core running up to 48 MHz

 One 24-bit system timer

 Supports low power Idle mode

 A single-cycle 32-bit hardware multiplier

 NVIC for the 32 interrupt inputs, each with 4-level of priority

 Supports Serial Wire Debug (SWD) interface and two watchpoints/four

breakpoints

 Built-in LDO for wide operating voltage: 2.1V to 5.5V

 Memory

 17.5 KB Flash memory for program memory (APROM)

 Configurable Flash memory for data memory (Data Flash)

 2 KB Flash for loader (LDROM)

 2 KB SRAM for internal scratch-pad RAM (SRAM)

 Clock Control

 Programmable system clock source

 Switch clock sources on-the-fly

 Support 4 ~ 24 MHz external high speed crystal oscillator (HXT) for precise

timing operation

 Support 32.768 kHz external low speed crystal oscillator (LXT) for idle wake-up

and system operation clock

 Built-in 48 MHz internal high speed RC oscillator (HIRC) for system operation

(1% accuracy at 250C, 5V)

 Dynamically calibrating the HIRC OSC to 48 MHz ±2% from -40℃ to 105℃

by external 32.768K crystal oscillator (LXT)

 Built-in 10 kHz internal low speed RC oscillator (LIRC) for Watchdog Timer and

wake-up operation

 I/O Port

 Up to 33 general-purpose I/O (GPIO) pins for LQFP-48 package

 Four I/O modes:

 Quasi-bidirectional input/output

 Push-Pull output

 Open-Drain output

 Input only with high impendence

 Optional Schmitt trigger input

 Timer

 Provides two channel 32-bit Timers; one 8-bit pre-scaler counter with 24-bit uptimer

for each timer

 Supports Event Counter mode

Supports Toggle Output mode

 Supports external trigger in Pulse Width Measurement mode

 Supports external trigger in Pulse Width Capture mode

 Support advanced capture function can continuous capture 4 edge on one

signal

WDT (Watchdog Timer)

 Programmable clock source and time-out period

 Supports wake-up function in Power-down mode and Idle mode

 Interrupt or reset selectable on watchdog time-out

PWM

 Up to three built-in 16-bit PWM generators, providing six PWM outputs or three

complementary paired PWM outputs

 Individual clock source, clock divider, 8-bit pre-scalar and dead-time generator

for each PWM generator

 PWM interrupt synchronized to PWM period

 Supports edge-alignment or center-alignment

 Supports fault detection

UART (Universal Asynchronous Receiver/Transmitters)

 Two UART devices

 Buffered receiver and transmitter, 16-byte FIFO for first UART (UART0), and 4-

byte FIFO for second UART (UART1)

 Optional flow control function (CTSn and RTSn) in first UART 0 only

 Supports IrDA (SIR) function

 Programmable baud-rate generator up to 1/16 system clock

 Supports RS-485 function

SPI (Serial Peripheral Interface)

 One SPI device

 Master up to 25 MHz, and Slave up to 10 MHz

 Supports Master/Slave mode

 Full-duplex synchronous serial data transfer

 Variable length of transfer data from 8 to 32 bits

 MSB or LSB first data transfer

 RX latching data can be either at rising edge or at falling edge of serial clock

 TX sending data can be either at rising edge or at falling edge of serial clock

 Supports Byte Suspend mode in 32-bit transmission

I2C

 Supports Master/Slave mode

 Bidirectional data transfer between masters and slaves

 Multi-master bus (no central master)

 Arbitration between simultaneously transmitting masters without corruption of

serial data on the bus

 Serial clock synchronization allowing devices with different bit rates to

communicate via one serial bus

 Serial clock synchronization can be used as a handshake mechanism to

suspend and resume serial transfer

 Programmable clocks allow for versatile rate control

 Supports multiple address recognition (four slave addresses with mask option)

ADC (Analog-to-Digital Converter)

 10-bit SAR ADC with 500 kSPS

 Up to 12-ch single-end input and one internal input from band-gap

 Conversion started either by software trigger or external pin trigger

Analog Comparator

 Two analog comparators with programmable 16-level internal voltage reference

 Built-in CRV (comparator reference voltage)

Hardware Divider

 Signed (two’s complement) integer calculation

 32-bit dividend with 16-bit divisor calculation capacity

 32-bit quotient and 32-bit remainder outputs (16-bit remainder with sign extends

to 32-bit)

 Divided by zero warning flag

 6 HCLK clocks taken for one cycle calculation

 Waiting for calculation ready automatically when reading quotient and remainder

ISP (In-System Programming), ICP (In-Circuit Programming), and IAP (In-Application-

Programming) update

BOD (Brown-out Detector)

 With 8 programmable threshold levels:

4.4V/3.7V/3.0V/2.7V/2.4V/2.2V/2.0V/1.7V

 Supports Brown-out interrupt and reset option

96-bit unique ID

LVR (Low Voltage Reset)

 Threshold voltage level: 2.0V

Operating Temperature: -40℃~105℃

Reliability: EFT > ± 3KV, ESD HBM pass 6KV

Packages:

 48-pin LQFP (7x7), 33-pin QFN (5x5), 20-pin TSSOP

 Package is Halogen-free, RoHS-compliant and TSCA-compliant.