NL17SH126数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

The NL17SH126 is an advanced high speed CMOS noninverting 3-state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation simiar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is compose of three stages, including a buffered 3-state output which provides high noise immunity and stable output. The NL17SH126 input structure provides protechtion when voltages up to 7 V are applied, regardless of the supply voltage. This allows the NL17SH126 to be used to interface 5 V circuits to 3 V circuits.

特性 Features

• High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V
• Low Power Dissipation: ICC = 1 uA (Max) at TA = 25C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• These are PbFree Devices

简介

NL17SH126属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的NL17SH126缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。