NB100LVEP17数据手册集成电路（IC）的专用逻辑器件规格书PDF

描述 Description

The NB100LVEP17 is a 4-bit differential line receiver.The design incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications.The VBB pin, an internally generated voltage supply, is available to this device only.For single-ended input conditions, the unused differential input is connected to VBB as switching reference voltage.VBB may also rebias AC coupled inputs.When used, decouple VBB and VCC via a 0.01 uF capacitor and limit current sourcing or sinking to 0.5 mA.When not used, VBB should be left open.Inputs of unused gates can be left open and will not affect the operation of the rest of the device.

特性 Features

• 250 ps Typical Propagation Delay
• Maximum Frequency >2.5 GHz Typical
• Flow through Pinout
• PECL Mode Operating Range:VCC = 2.375 V to 3.8 V, with VEE = 0 V
• NECL Mode Operating Range:VCC = 0 V, with VEE = -2.375 V to -3.8 V
• Q Output will Default LOW with Inputs Open or at VEE
• VBB Output

简介

NB100LVEP17属于集成电路（IC）的专用逻辑器件。由制造生产的NB100LVEP17专用逻辑器件专用逻辑 IC 设计提供应用特定的逻辑输出类型，例如 BCD 速率倍增、可寻址扫描端口、总线终端阵列、CML 驱动器、比较器、ABT 扫描测试、二进制全加法器、互补对加逆变器、可配置缓冲器、触点颤动消除器、晶体振荡器、延迟元件、差分接收器、LVTTL 到 GTLP 收发器、存储器解码器、电源良好检测器和分频器。