N80C51GB数据手册Intel中文资料规格书

描述 Description

MEMORY ORGANIZATION
PROGRAM MEMORY: Up to 8 Kbytes of the program memory can reside in the on-chip ROM. Also, the device can address up to 64K of program memory external to the chip.■ 8 Kbytes On-Chip ROM/OTP ROM
■ 256 Bytes of On-Chip Data RAM
■ Two Programmable Counter Arrays with:
   - 2 x 5 High Speed Input/Output Channels Compare/Capture
   - Pulse Width Modulators
   - Watchdog Timer Capabilities
■ Three 16-Bit Timer/Counters with
   - Four Programmable Modes:
   - Capture, Baud Rate Generation (Timer 2)
■ Dedicated Watchdog Timer
■ 8-Bit, 8-Channel A/D with:
   - Eight 8-Bit Result Registers
   - Four Programmable Modes
■ Programmable Serial Channel with:
   - Framing Error Detection
   - Automatic Address Recognition
■ Serial Expansion Port
■ Programmable Clock Out
■ Extended Temperature Range: (b40§C to a85§C)
■ 48 Programmable I/O Lines with 40 Schmitt Trigger Inputs
■ 15 Interrupt Sources with:
   - 7 External, 8 Internal Sources
   - 4 Programmable Priority Levels
■ Pre-Determined Port States on Reset
■ High Performance CHMOS Process
■ TTL and CHMOS Compatible Logic Levels
■ Power Saving Modes
■ 64K External Data Memory Space
■ 64K External Program Memory Space
■ Three Level Program Lock System
■ ONCE (ON-Circuit Emulation) Mode
■ Quick Pulse Programming Algorithm
■ MCSÉ 51 Microcontroller Fully Compatible Instruction Set
■ Boolean Processor
■ Oscillator Fail Detect
■ Available in 68-Pin PLCC