Bus interface latches

74F841/74F842 10-bit bus interface latches, non-inverting/inverting (3-State) 74F843 9-bit bus interface latch, non-inverting (3-State) 74F845/74F846 8-bit bus interface latches, non-inverting/inverting (3-State) DESCRIPTION The 74F841–74F846 bus interface latch series are designed to provide

文件：206.8 Kbytes 页数：18 Pages

PHI

飞利浦

Bus interface latches

74F841/74F842 10-bit bus interface latches, non-inverting/inverting (3-State) 74F843 9-bit bus interface latch, non-inverting (3-State) 74F845/74F846 8-bit bus interface latches, non-inverting/inverting (3-State) DESCRIPTION The 74F841–74F846 bus interface latch series are designed to provide

文件：206.8 Kbytes 页数：18 Pages

PHI

飞利浦

9-Bit Transparent Latch

General Description The 74F843 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. Features ■ 3-STATE output

文件：49.29 Kbytes 页数：6 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Bus interface latches

74F841/74F842 10-bit bus interface latches, non-inverting/inverting (3-State) 74F843 9-bit bus interface latch, non-inverting (3-State) 74F845/74F846 8-bit bus interface latches, non-inverting/inverting (3-State) DESCRIPTION The 74F841–74F846 bus interface latch series are designed to provide

文件：206.8 Kbytes 页数：18 Pages

PHI

飞利浦

9-Bit Transparent Latch

General Description The 74F843 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. Features ■ 3-STATE output

文件：49.29 Kbytes 页数：6 Pages

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司