N74F723AN中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The 74F723A/74F723-1 consist of four 3-to-1 multiplexers designed for address multiplexing of dynamic RAMs and other multiplexing applications. Select (S0, S1) inputs control which line is to be selected, as defined in the Function Table for 74F723A/74F723-1. When the invering input (INV) is Low, the input data path is inverted.

FEATURES for 74F723A/74F723-1

• Consists of four 3-to-1 Multiplexers

• High impedance PNP base inputs for reduced loading (20µA in High and Low states)

• Inverting or non-inverting data path capability by an inverting (INV) input

• Designed for address multiplexing of dynamic RAM and other applications

• Multiple side pins for VCC and GND to reduce lead inductance (improves speed and noise immunity)

• 3-State outputs sink 64mA (74F723A only)

• 30Ω termination impedance on each output – 74F723-1

FEATURES for 74F725A/74F725-1

• Consists of four 4-to-1 Multiplexers

• High impedance PNP base inputs for reduced loading (20µA in High and Low states)

• Equivalent to two 74F253s without 3-State

• Outputs sink 64mA (74F725A only)

• 30Ω termination impedance on each output – 74F725-1