N74F569D中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The 74F569 is a fully synchronous Up/Down binary counter. It features preset capabilities for programmable operation, carry look ahead for programmable operation, carry look ahead for easy cascading, and U/Dinput to control the direction of counting. For maximum flexibility there are both Synchronous and Master Reset

inputs as well as both Clocked Carry (CC) and Terminal Count (TC) outputs. All state changes except Master Reset are initiated by rising edge of the clock. A High signal on the Output Enable (OE) input forces the output buffers into the high impedance state but does not prevent counting, resetting or parallel loading.

FEATURES

•4-bit bidirectional counting – binary counter

•Synchronous counting and loading

•Look ahead carry capability for easy cascading

•Preset capability for programmable operation

•Master Reset (MR) overrides all other inputs

•Synchronous Reset (SR) overrides counting and parallel loading

•Clock Carry (CC) output to be used as a clock for flip-flops, register and counters

•3-State outputs for bus organized systems