N74F544D中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The 74F543 and 74F544 Octal Registered Transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. While the 74F543 has non-inverting data path, the 74F544 inverts data in both directions. The A outputs are guaranteed to sink 24mA, while the B outputs are rated for 64mA.

FEATURES

• Combines74F245 and 74F373 type functions in one chip

• 8-bit octal transceiver with D-type latch

• 74F543 Non-inverting

74F544 Inverting

• Back-to-back registers for storage

• Separate controls for data flow in each direction

• A outputs sink 20mA and source 3mA

• B outputs sink 64mA and source 15mA

• 3-State outputs for bus-oriented applications

• 74F543 available in SSOP Type II package