MX29F001TTC-12中文资料​​​​​​​​​​​​旺宏电子数据手册PDF规格书

GENERAL DESCRIPTION

The MX29F001T/B is a 1-mega bit Flash memory organized as 128K bytes of 8 bits only MXICs Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29F001T/B is packaged in 32-pin PLCC, TSOP, PDIP. It is designed to be reprogrammed and erased in-system or in-standard EPROM programmers.

FEATURES

• 5.0V ± 10 for read, erase and write operation

• 131072x8 only organization

• Fast access time: 55/70/90/120ns

• Low power consumption

– 30mA maximum active current(5MHz)

– 1uA typical standby current

• Command register architecture

– Byte Programming (7us typical)

– Sector Erase (8K-Byte x1,4K-Byte x 2, 8K Bytex2, 32K-Bytex1, and 64K-Byte x1)

• Auto Erase (chip & sector) and Auto Program

– Automatically erase any combination of sectors with Erase Suspend capability.

– Automatically programs and verifies data at speci fied address

• Erase Suspend/Erase Resume

– Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation.

• Status Reply

– Data polling & Toggle bit for detection of program and erase cycle completion.

• Chip protect/unprotect for 5V only system or 5V/12V system

• 100,000 minimum erase/program cycles

• Latch-up protected to 100mA from -1 to VCC+1V

• Boot Code Sector Architecture

– T = Top Boot Sector

– B = Bottom Boot Sector

• Low VCC write inhibit is equal to or less than 3.2V

• Package type:

– 32-pin PLCC

– 32-pin TSOP

– 32-pin PDIP

• Boot Code Sector Architecture

– T=Top Boot Sector

– B=Bottom Boot Sector

• 20 years data retention