MX25L4005M2C-15中文资料​​​​​​​​​​​​旺宏电子数据手册PDF规格书

GENERAL DESCRIPTION

The MX25L4005 is a CMOS 4,194,304 bit serial Flash memory, which is configured as 524,288 x 8 internally. The MX25L4005 feature a serial peripheral interface and soft ware protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS# input.

FEATURES

GENERAL

• Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3

• 4,194,304 x 1 bit structure

• 128 Equal Sectors with 4K byte each

- Any Sector can be erased individually

• 8 Equal Blocks with 64K byte each

- Any Block can be erased individually

• Single Power Supply Operation

- 2.7 to 3.6 volt for read, erase, and program operations

• Latch-up protected to 100mA from -1V to Vcc +1V

• Low Vcc write inhibit is from 1.5V to 2.5V

PERFORMANCE

• High Performance

- Fast access time: 70MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load)

- Fast program time: 1.4ms(typ.) and 5ms(max.)/page(256-byte per page)

- Fast erase time: 60ms(typ.) and 120ms(max.)/sector(4K-byte per sector) ; 1s(typ.) and 2s(max.)/block (64K byte per block)

• Low Power Consumption

- Low active read current: 12mA(max.) at 70MHz, 8mA(max.) at 66MHz and 4mA(max.) at 33MHz

- Low active programming current: 15mA (max.)

- Low active erase current: 15mA (max.)

- Low standby current: 10uA (max.)

- Deep power-down mode 1uA (typical)

• Minimum 100,000 erase/program cycles