MT9040集成电路（IC）的电信规格书PDF中文资料

描述 Description

The MT9040 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for T1 and E1 primary rate transmission links.

特性 Features

• Supports AT&T TR62411 and Bellcore GR-1244- CORE and Stratum 4 timing for DS1 interfaces

• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces

• Selectable 19.44 MHz, 1.544MHz, 2.048MHz or 8kHz input reference signals

• Provides C1.5, C2, C4, C6, C8, C16, and C19 (STS-3/OC3 clock divided by 8) output clock signals

• Provides 5 different styles of 8 KHz framing pulses

• Attenuates wander from 1.9Hz

• Fast lock mode

• JTAG Boundary Scan

Applications

• Synchronization and timing control for multitrunk T1 and E1 systems

• ST-BUS clock and frame pulse source