128K x 8 SRAM WITH CHIP & OUTPUT ENABLE

GENERAL DESCRIPTION The MT5C1009 is a 1,048,576-bit high-speed CMOS static RAM organized as 131,072 words by 8 bits. This device uses 8 common input and output lines and has an output enable pin which operate faster than address access times during READ cycle. For design flexibility in high-

文件：254.43 Kbytes 页数：17 Pages

AUSTIN

128K x 8 SRAM WITH CHIP & OUTPUT ENABLE

GENERAL DESCRIPTION The MT5C1009 is a 1,048,576-bit high-speed CMOS static RAM organized as 131,072 words by 8 bits. This device uses 8 common input and output lines and has an output enable pin which operate faster than address access times during READ cycle. For design flexibility in high-

文件：254.43 Kbytes 页数：17 Pages

AUSTIN

POIYSTAK
BGA

POIYSTAK

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MTK
SMD

MTK

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MTK

MTK

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