SRAM

GENERAL DESCRIPTION The MT5C1001 employs low power, high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes while CMOS circuitry reduces power consumption and provides for greater reliability. FEATURES • High Speed: 20, 25, 35, and

文件：166.87 Kbytes 页数：13 Pages

AUSTIN

SRAM

GENERAL DESCRIPTION The MT5C1001 employs low power, high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes while CMOS circuitry reduces power consumption and provides for greater reliability. FEATURES • High Speed: 20, 25, 35, and

文件：166.87 Kbytes 页数：13 Pages

AUSTIN

SRAM

GENERAL DESCRIPTION The MT5C1001 employs low power, high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes while CMOS circuitry reduces power consumption and provides for greater reliability. FEATURES • High Speed: 20, 25, 35, and

文件：166.87 Kbytes 页数：13 Pages

AUSTIN

1M x 1 SRAM SRAM MEMORY ARRAY

文件：100.29 Kbytes 页数：13 Pages

AUSTIN

1M x 1 SRAM SRAM MEMORY ARRAY

文件：100.29 Kbytes 页数：13 Pages

AUSTIN

1M x 1 SRAM SRAM MEMORY ARRAY

文件：100.29 Kbytes 页数：13 Pages

AUSTIN

1M x 1 SRAM SRAM MEMORY ARRAY

文件：100.29 Kbytes 页数：13 Pages

AUSTIN

1M x 1 SRAM SRAM MEMORY ARRAY

文件：100.29 Kbytes 页数：13 Pages

AUSTIN

1M x 1 SRAM SRAM MEMORY ARRAY

文件：100.29 Kbytes 页数：13 Pages

AUSTIN

1M x 1 SRAM SRAM MEMORY ARRAY

文件：100.29 Kbytes 页数：13 Pages

AUSTIN