MT4LC1M16E5中文资料镁光数据手册PDF规格书

GENERAL DESCRIPTION

The 1 Meg x 16 is a randomly accessed, solid-state memory containing 16,777,216 bits organized in a x16 configuration.

FEATURES

• JEDEC- and industry-standard x16 timing, functions, pinouts, and packages

• High-performance CMOS silicon-gate process

• Single power supply (+3.3V ±0.3V or 5V ±10)

• All inputs, outputs and clocks are TTL-compatible

• Refresh modes: RAS#-ONLY, CAS#-BEFORE-RAS# (CBR), HIDDEN; optional self refresh (S)

• BYTE WRITE access cycles

• 1,024-cycle refresh (10 row, 10 column addresses)

• Extended Data-Out (EDO) PAGE MODE access

• 5V-tolerant inputs and I/Os on 3.3V devices