MT4C4001JECN-7/XT技术资料参数供应代理-114ic电子网

型号	下载订购	功能描述	制造商上传企业	LOGO
MT4C4001JECN-7/XT	文件：251.25 Kbytes Page：20 Pages	1 MEG x 4 DRAM Fast Page Mode DRAM GENERAL DESCRIPTION The MT4C4001J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x4 configuration. During READ or WRITE cycles each bit is uniquely addressed through the 20 address bits which are entered 10 bits (A0-A9) at a time. RAS is used to latch the fir 文件：251.25 Kbytes 页数：20 Pages	AUSTIN	AUSTIN
MT4C4001JECN-7/XT	文件：1.1819 Mbytes Page：21 Pages	1 MEG x 4 DRAM Fast Page Mode DRAM 文件：1.1819 Mbytes 页数：21 Pages	AUSTIN	AUSTIN
MT4C4001JECN-7SLASHIT	文件：1.1819 Mbytes Page：21 Pages	1 MEG x 4 DRAM Fast Page Mode DRAM 文件：1.1819 Mbytes 页数：21 Pages	AUSTIN	AUSTIN
MT4C4001JECN-7SLASHIT	文件：251.25 Kbytes Page：20 Pages	1 MEG x 4 DRAM Fast Page Mode DRAM GENERAL DESCRIPTION The MT4C4001J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x4 configuration. During READ or WRITE cycles each bit is uniquely addressed through the 20 address bits which are entered 10 bits (A0-A9) at a time. RAS is used to latch the fir 文件：251.25 Kbytes 页数：20 Pages	AUSTIN	AUSTIN
MT4C4001JECN-7SLASHXT	文件：1.1819 Mbytes Page：21 Pages	1 MEG x 4 DRAM Fast Page Mode DRAM 文件：1.1819 Mbytes 页数：21 Pages	AUSTIN	AUSTIN

更多MT4C4001JECN-7/XT供应商更新时间2025-8-23 9:53:00