MT4C4001J中文资料MICROSS数据手册PDF规格书

GENERAL DESCRIPTION

The MT4C4001J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x4 configuration.

FEATURES

• Industry standard x4 pinout, timing, functions, and packages

• High-performance, CMOS silicon-gate process

• Single +5V±10 power supply

• Low-power, 2.5mW standby; 300mW active, typical

• All inputs, outputs, and clocks are fully TTL and CMOS compatible

• 1,024-cycle refresh distributed across 16ms

• Refresh modes: RAS-ONLY, CAS-BEFORE-RAS (CBR), and HIDDEN

• FAST PAGE MODE access cycle

• CBR with WE a HIGH (JEDEC test mode capable via WCBR)