MT4C4001J中文资料AUSTIN数据手册PDF规格书
MT4C4001J规格书详情
GENERAL DESCRIPTION
The MT4C4001J is a randomly accessed solid-state memory containing 4,194,304 bits organized in a x4 configuration. During READ or WRITE cycles each bit is uniquely addressed through the 20 address bits which are entered 10 bits (A0-A9) at a time. RAS is used to latch the first 10 bits and CAS the later 10 bits. A READ or WRITE cycle is selected with the WE input. A logic HIGH on WEdictates READ mode while a logic LOW on WE dictates WRITE mode. During a WRITE cycle, data-in (D) is latched by the falling edge of WE or CAS, whichever occurs last.
FEATURES
• Industry standard x4 pinout, timing, functions, and packages
• High-performance, CMOS silicon-gate process
• Single +5V±10 power supply
• Low-power, 2.5mW standby; 300mW active, typical
• All inputs, outputs, and clocks are fully TTL and CMOS compatible
• 1,024-cycle refresh distributed across 16ms
• Refresh modes: RAS-ONLY, CAS-BEFORE-RAS(CBR), and HIDDEN
• FAST PAGE MODE access cycle
• CBR with WE a HIGH (JEDEC test mode capable via WCBR)
产品属性
- 型号:
MT4C4001J
- 制造商:
AUSTIN
- 制造商全称:
Austin Semiconductor
- 功能描述:
1 MEG x 4 DRAM Fast Page Mode DRAM
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
MRON/美光 |
23+ |
NA/ |
67 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
询价 | ||
MICRON |
95+ |
SOJ20 |
67 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
询价 | ||
MCT |
48 |
原装正品长期供货,如假包赔包换 徐小姐13714450367 |
询价 | ||||
MICRON |
23+ |
SOJ |
12800 |
公司只有原装 欢迎来电咨询。 |
询价 | ||
MT |
20 |
公司优势库存 热卖中!! |
询价 | ||||
MIT |
2016+ |
SOJ |
6528 |
只做原厂原装现货!终端客户个别型号可以免费送样品! |
询价 | ||
ASI |
23+ |
CDIP |
66800 |
原装正品专营军工 |
询价 | ||
MIC |
23+ |
NA |
661 |
专做原装正品,假一罚百! |
询价 | ||
FUJITSU |
SOJ20 |
68900 |
原包原标签100%进口原装常备现货! |
询价 | |||
MIT |
94 |
SOJ |
152 |
原装现货海量库存欢迎咨询 |
询价 |
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