MT28F800B3数据手册集成电路（IC）的存储器规格书PDF

描述 Description

GENERAL DESCRIPTION
The MT28F008B3 (x8) and MT28F800B3 (x16/x8) are low-voltage, nonvolatile, electrically block-erasable (flash), programmable memory devices containing 8,388,608 bits organized as 524,288 words (16 bits) or 1,048,576 bytes (8 bits). Writing and erasing the device is done with a VPP voltage of either 3.3V or 5V, while all operations are performed with a 3.3V VCC. Due to process technology advances, 5V VPP is optimal for application and production programming. These devices are fabricated with Micron’s advanced 0.18µm CMOS floating-gate process.
The MT28F008B3 and MT28F800B3 are organized into eleven separately erasable blocks. To ensure that critical firmware is protected from accidental erasure or overwrite, the devices feature a hardware-protected boot block. This block may be used to store code implemented in low-level system recovery. The remaining blocks vary in density and are written and erased with no additional security measures.
Refer to Micron’s Web site (www.micron.com/flash) for the latest data sheet.FEATURES
• Eleven erase blocks:
   16KB/8K-word boot block (protected)
   Two 8KB/4K-word parameter blocks
   Eight main memory blocks
• Smart 3 technology (B3):
   3.3V ±0.3V VCC
   3.3V ±0.3V VPP application programming
   5V ±10% VPP application/production programming1
• Compatible with 0.3µm Smart 3 device
• Advanced 0.18µm CMOS floating-gate process
• Address access time: 90ns
• 100,000 ERASE cycles
• Industry-standard pinouts
• Inputs and outputs are fully TTL-compatible
• Automated write and erase algorithm
• Two-cycle WRITE/ERASE sequence
• TSOP, SOP and FBGA packaging options
• Byte- or word-wide READ and WRITE
   (MT28F800B3):
      1 Meg x 8/512K x 16

特性 Features

• Eleven erase blocks:
   16KB/8K-word boot block (protected)
   Two 8KB/4K-word parameter blocks
   Eight main memory blocks
• Smart 3 technology (B3):
   3.3V ±0.3V VCC
   3.3V ±0.3V VPP application programming
   5V ±10% VPP application/production programming1
• Compatible with 0.3µm Smart 3 device
• Advanced 0.18µm CMOS floating-gate process
• Address access time: 90ns
• 100,000 ERASE cycles
• Industry-standard pinouts
• Inputs and outputs are fully TTL-compatible
• Automated write and erase algorithm
• Two-cycle WRITE/ERASE sequence
• TSOP, SOP and FBGA packaging options
• Byte- or word-wide READ and WRITE
   (MT28F800B3):
      1 Meg x 8/512K x 16