MSP430L092中文资料具有 2KB ROM、2KB SRAM、8 位 ADC、8 位 DAC、比较器和计时器的 4MHz MCU数据手册TI规格书

描述 Description

The Texas Instruments MSP430 family of ultra-low-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The digitally controlled internal oscillators allow wake-up from low-power modes to active mode in less than 5 µs. The MSP430C09x and MSP430L092 series are microcontroller configurations with two 16-bit timers, an ultra-low-voltage 8-bit analog-to-digital (A/D) converter, an 8-bit digital-to-analog (D/A) converter, and up to 11 I/O pins. Typical applications for this device include single-cell systems requiring a full analog signal chain.

特性 Features

• Ultra-Low Supply Voltage (ULV) Range
• 0.9 V to 1.5 V (1 MHz)
• 1.5 V to 1.65 V (4 MHz)

• Low Power Consumption
• Active Mode (AM): 45 µA/MHz (1.3 V)
• Standby Mode (LPM3, WDT_A Mode): 6 µA
• Off Mode (LPM4): 3 µA

• Wake-Up From LPMx in Less Than 5 µs
• 16-Bit RISC Architecture
• Extended Instructions
• Up to 4-MHz System Clock

• Compact Clock System
• 1-MHz Internal Trimmable High-Frequency Clock
• 20-kHz Internal Low-Frequency Clock Source
• External Clock Input

• 16-Bit Timer0_A3 With Three Capture/Compare Registers
• 16-Bit Timer1_A3 With Three Capture/Compare Registers
• ULV Analog Pool Modes
• 8-Bit Analog-to-Digital Converter (ADC)
• 8-Bit Digital-to-Analog Converter (DAC)
• Programmable Comparator (COMP)
• Supply Voltage Monitor (SVM)
• Temperature Sensor
• Internal Reference Voltage Source

• ULV Port Logic
• VOL Better Than 0.15 V at 2.5 mA
• VOH Better Than VCC – 0.15 V at 1 mA
• Timer0 PWM Signal Available on All Ports
• Timer1 PWM Signal Available on All Ports

• ULV Brownout Circuit (BOR)
• ULV RAM Retention Voltage Below BOR Level
• 32-Bit Watchdog Timer (WDT-A)
• Bootstrap Loader in MSP430L092 Development/Prototyping Device
• Full Four-Wire JTAG Debug Interface
• Family Members Include
• MSP430C091
• 1KB ROM Memory
• 128 Bytes RAM + 96 Bytes CRAM (Lockable)

• MSP430C092
• 2KB ROM Memory
• 128 Bytes RAM + 96 Bytes CRAM (Lockable)

• MSP430L092
• 2KB Loader ROM With Service Functions
• 2KB RAM (1792 + 128 + 96 Bytes Lockable)


• For Complete Module Descriptions, See the MSP430x09x Family User’s Guide (SLAU321)