MSM548331数据手册OKI中文资料规格书

描述 Description

DESCRIPTION
The MSM548331 is a 2.7-Mbit, 768 bits x 290 lines, Field Memory.  Access is done line by line. The line
address must be set each time a line is changed.
More than two MSM548331s can be cascaded directly without any delay devices between them. Cascading MSM548331s provides larger capacity and longer delay.FEATURES
• 768 ´ 290 ´ 12-bit configuration
• Line by line access
• X serial address inputs for random serial initial bit address
• Asynchronous operation
• Serial read and write cycle times
  Read cycle: 30 ns
  Write cycle: 30 ns
• Low operating supply voltage: 3.3 V ±0.3 V
• Self-refresh
• Various address reset mode for picture processing
• Write mask function (Input enable control)
• Data skipping function (Output enable control)
• Package:
  44-pin 400 mil plastic TSOP (Type II) (TSOPII44-P-400-0.80-K) (Product : MSM548331TS-K)

特性 Features

• 768 ´ 290 ´ 12-bit configuration
• Line by line access
• X serial address inputs for random serial initial bit address
• Asynchronous operation
• Serial read and write cycle times
  Read cycle: 30 ns
  Write cycle: 30 ns
• Low operating supply voltage: 3.3 V ±0.3 V
• Self-refresh
• Various address reset mode for picture processing
• Write mask function (Input enable control)
• Data skipping function (Output enable control)
• Package:
  44-pin 400 mil plastic TSOP (Type II) (TSOPII44-P-400-0.80-K) (Product : MSM548331TS-K)