Dual FIFO (262,214 Words 횞 8 Bits) 횞 2

GENERAL DESCRIPTION The MS81V04166A is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories isconnected in common, and th

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Dual FIFO (262,214 Words 횞 8 Bits) 횞 2

GENERAL DESCRIPTION The MS81V04166A is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories isconnected in common, and th

文件：144.9 Kbytes 页数：19 Pages

OKIOki Electric Cable Co.,Ltd

冲电线日本冲电线株式会社

Dual FIFO (262,214 Words 횞 8 Bits) 횞 2

文件：178.83 Kbytes 页数：24 Pages

OKIOki Electric Cable Co.,Ltd

冲电线日本冲电线株式会社

Dual FIFO

GENERAL DESCRIPTION\nThe MS81V04166A is a single-chip 4Mb FIFO functionally composed of two Oki’s 2Mb FIFO (First-In First-Out) memories which were designed for 256k ×8-bit high-speed asynchronous read/write operation. The read clock of each of the 2Mb FIFO memories isconnected in common, and the cl •262,214 words ×8 bits ×2\n• Fast FIFO (First-In First-Out) Operation: 25 ns cycle time\n• Self refresh (No refreshcontrol is required)\n• High speed asynchronous serial access\n Read/Write Cycle Time  20 ns/25 ns\n Access Time   18 ns/23 ns\n• Variable length delay bit (150 to 262214)\n• Write mask;

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