MPC96877EP中文资料瑞萨数据手册PDF规格书

厂商型号	MPC96877EP
功能描述	1.8 V PLL 1:10 Differential SDRAM Clock Driver
文件大小	706.1 Kbytes
页面数量	14 页
生产厂商	Renesas Technology Corp
企业简称	RENESAS【瑞萨】
中文名称	瑞萨科技有限公司官网
原厂标识
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-8-3 18:22:00
人工找货	MPC96877EP价格和库存，欢迎联系客服免费人工找货

Recommended Applications

• DDR II Memory Modules

• Zero Delay Board fan-out

特性 Features

• 1.8 V Phase Lock Loop Clock Driver for (DDR II) Applications

• Spread Spectrum Clock Compatible

• Operating Frequency: 100 MHz to 340 MHz

• 1 to 10 differential clock distribution (SSTL_18)

• 52-Ball VF-BGA (FP-MAPBGA 0.65-mm pitch) and 40-Pin MLF (QFN)

• 52-lead Pb-free Package Available

• External Feedback Pins (FBIN, FBIN) are used to synchronize the Outputs

to the Input Clocks

• Single-Ended Input and Single-Ended Output Modes

• Meets or Exceeds JESD82-8 PLL Standard for PC2-3200/4300

• Auto Power Down detect logic

Switching Characteristics

• Cycle-to-Cycle Jitter (>165 Mhz): 40 ps max.

• Output-to-Output Skew: 40 ps max.