MPC8358VVADDEA数据手册恩XP中文资料规格书

描述 Description

NXP® Semiconductors's MPC8360E PowerQUICC® II™ Pro family of integrated communications processors is a next-generation extension of the popular PowerQUICC II line containing cores built on Power Architecture technology. The MPC8360E family incorporates a next-generation communications engine, the QUICC™ Engine, supporting a wide range of protocols, including Gigabit Ethernet and OC-12 asynchronous transfer mode (ATM)/Packet over Sonet (POS). Additional enhancements include the e300 core (enhanced version of the 603e™ core with larger caches), scaling up to 667 MHz, a DDR memory controller and the integrated security engine.
The MPC8360E PowerQUICC II Pro communications processor's advanced features make it suitable for today's and tomorrow's wired and wireless access equipment, as well as small and medium enterprise networking equipment. Target applications include multitenant units (MTUs), digital subscriber line access multiplexers (DSLAMs), wireless basestations, multi and fixed subscriber access nodes, add/drop multiplexers and routers.
The MPC8358E processor, a member of the MPC8360E PowerQUICC II Pro family, is pin-compatible with the MPC8360E (TBGA only). The MPC8358E offers a cost-effective, low-power processing solution that meets the performance requirements for broadband access applications, such as small-to-medium enterprise (SME) routers, low-end DSLAMs and IP private automatic branch exchange (PABX) systems.

特性 Features

DDR memory controller
• Programmable timing supporting DDR-1 and DDR-2 SDRAM
• 2 x 32-bit or 1 x 64-bit data interface; up to 266 MHz data rate
• Four banks of memory, each up to 1 GB
• Full ECC support

应用 Application

Secure Transaction and Retail Payments
•POS Printer