MPC8347VVAGDB中文资料PowerQUICC, 32 Bit Power Arch SoC, 400MHz, DDR1/2, PCI, 1GbE, USB, 0 to 105C, Rev 2数据手册恩XP规格书

描述 Description

The MPC8347E PowerQUICC® II™ Pro integrated communications processor is a next-generation extension of the popular PowerQUICC II line. Based on a system-on-chip (SoC) architecture, the MPC8347E PowerQUICC II Pro integrates the enhanced e300 core and advanced features, such as DDR memory, Dual Gigabit Ethernet, Dual PCI and Hi-Speed USB controllers. With clock speeds scaling to 667 MHz, the MPC8347E processor offers the highest performing PowerQUICC II device.
The MPC8347E PowerQUICC II Pro is designed to provide a cost-effective, highly integrated control processing solution that addresses the emerging needs of networking, communications and pervasive computing applications. MPC8347E processor can be used in applications such as Ethernet routers and switches, wireless LAN (WLAN) equipment, network storage, home network appliances, industrial control equipment, and copiers, printers and other imaging systems.
e300 SoC PlatformThe MPC8347E PowerQUICC II Pro is based on the e300 SoC platform—making it easy and fast to add or remove functional blocks and develop additional SoC-based family members targeting emerging market requirements. At the heart of the e300 SoC platform is NXP® Semiconductors's e300 core. Based on the classic instruction-set architecture, the e300 core is an enhanced version of the 603e core used in previous-generation PowerQUICC II processors. Enhancements include twice as much L1 cache (32 KB data cache and 32 KB instruction cache) with integrated parity checking, and other performance-enhancing features. The e300 core is completely software-compatible with existing 603e core-based products.
Integrated SecurityThe MPC8347E 7 features a powerful integrated security engine derived from NXP Semiconductors's security coprocessor product line. The MPC8347E security engine supports DES, 3DES, MD-5, SHA-1, AES, and ARC-4 encryption algorithms, as well as a public key accelerator and an on-chip random number generator. The security engine is capable of single-pass encryption and authentication, as required by IPsec, IEEE® 802.11i standard and other security protocols.

特性 Features

e300 core operating from 266 MHz up to 667 MHz (enhanced version of 603e core with larger caches)
• 32-bit, high-performance superscalar core