MPC8306VMAFDCA中文资料PowerQUICC, Power Arch SoC, 333MHz, DDR2, HDLC, TDM, Enet, USB, CAN, 0 to 105C, Rev 1.1数据手册恩XP规格书

描述 Description

The MPC8306 and MPC8306S are part of the cost-effective MPC830x communications processor family based on the e300 core and built on Power Architecture® technology. The devices integrate QUICC Engine® technology capable of supporting HDLC, TDM and 10/100 R/MII. The MPC8306 also supports IEEE® 1588 v2 time stamping. The MPC8306/S devices provide users with a highly integrated, fully programmable communications processor for use in many networking, industrial control and low-end embedded applications. This helps ensure that a cost-effective system solution can be quickly developed and offers flexibility to accommodate new standards and evolving system requirements.

特性 Features

• e300 core running up to 266 MHz
• DDR2 @ 266 MHz
• QUICC Engine® running up to 200 MHz
• 2x HDLC/TDM
• 3x 10/100 or 2x 10/100 w/IEEE 1588 v2 (MPC8306 only)
• USB 2.0
• eSDHC (boot from eSDHC support on MPC8306 only)
• 4x CAN (MPC8306 only)
• 4x UART
• Local bus (boot from NOR/NAND Flash memory support)
• 0.95W typical at 266 MHz e300 core/200 MHz QUICC Engine (maximum = 1.28W)
• 369 pin 19 x 19 mm MAPBGA package
• This product is included in NXP®.s product longevity program, with assured supply for a minimum of 10 years after launch