MPC7445中文资料Host Processor数据手册恩XP规格书

描述 Description

Overview Archived content is no longer updated and is made available for historical reference only.
Highlighting NXP® Semiconductors's continued innovation and performance leadership in the high-performance embedded processor market, the MPC7445 offers the same level of performance as the award-winning MPC7455, which was named 2001 EMBEDDED PROCESSOR OF THE YEAR by In-Stat/MDR, a leading microprocessor research and analysis firm that publishes Microprocessor Report.
The MPC7445 host processor is a high-performance, low-power 32-bit implementation of the RISC architecture with a full 128-bit implementation of Our AltiVec®™ technology. Delivering a high level of performance with efficient power consumption across virtually all speeds, this innovative processor provides networking and computing product OEMs with a best-in-class solution for a wide range of host processor applications—including high-performance network infrastructure and telecommunications equipment, computing products and embedded systems.
Offered in a 360-pin CBGA package, the MPC7445 processor is footprint-compatible with Our MPC7441 processor, providing an easy migration path for OEMs seeking higher performance for their new or existing Power Architecture processor-based applications. The 360-pin MPC7445 is an ideal choice for space-constrained applications requiring a smaller embedded CPU footprint. The MPC7445 can reach speeds of 1GHz with a core voltage of 1.3V and includes 256KB of on-chip L2 cache.
The MPC7445 is manufactured on Our 0.13-micron HiPerMOS silicon-on-insulator (SOI) copper interconnect process technology, enabling it to deliver superior performance over bulk CMOS technology. In addition to increased performance, SOI technology offers excellent low power capability, making the devices ideal for embedded applications in the wired and wireless telecommunications, networking and imaging arenas.
In addition to operating at high clock speeds, the MPC7445 processor offers the following features designed to optimize performance and functionality in embedded applications:
Full Symmetric multiprocessing (SMP) support — SMP capability enables customers to achieve significantly higher system performance by scaling their embedded system designs with multiple NXP PowerC processors.
More block address translation (BAT) registers — BAT registers have been increased from 8 to 16 to support efficient embedded operating systems through high-speed mapping of additional large blocks of data.
Cache locking — Cache way locking has been added to the L1 caches, allowing key performance algorithms and code to be locked in the L1 cache.
AltiVec technology — All members of Our G4 family of processors include a full 128-bit implementation of Our advanced AltiVec Single Instruction Multiple Data (SIMD) vector processing technology. AltiVec technology allows designers to leverage existing code and add AltiVec performance as market and customers' requirements change—helping speed time-to-market and increase system performance without upgrading hardware.

特性 Features

Superscalar Microprocessor 
•Four integer units (3 simple + 1 complex)
•Double-precision floating-point unit
•Four AltiVec® units (simple, complex, floating, and permute)
•Load/store unit
•Branch processing unit
•Pin compatible with the MPC7441 processor.
•As with all processors built on Power Architecture technology, the MPC7445 is compatible with the MPC7xx family of processors from NXP®.
•Processors built on Power Architecture technology enjoy the broadest set of operating systems, compilers, and development tools from third-party tool vendors belonging to NXP Connect partner program.
•Three issue (plus branch) capability
•128-bit wide vector unit—AltiVec technology
•Integrated 256K on-chip L2 cache (twice the size of previous generation)
•Full Symmetric Multi-Processing capability (SMP)
•36-bit physical address space for direct addressability of 64 Gigabytes of memory
•Hardware and Software Tablewalk
•High-bandwidth 133 MHz 64-bit MPX Bus/60x Bus
•Twice the number of BAT registers as previous generation
•Three power-saving user-programmable modes to reduce power drawn by processor
•Parity checking support on L1 and L2 cache arrays