MMC2114中文资料32-bit Microcontroller数据手册恩XP规格书

描述 Description

Overview The MMC2114 single-chip microcontroller is the second member of a family of general purpose microcontrollers based on the M210 core. It cost-effectively integrates digital and analog peripherals with RAM, embedded FLASH memory, and a 32-bit M·CORE microRISC central processor unit on a single-chip. The MMC2114 expands on the features of the popular MMC2107 with twice the FLASH and four times the amount of SRAM.
Archived content is no longer updated and is made available for historical reference only.

特性 Features

• 32-bit M·CORE family M210 microRISC central processor unit capable of 31 Dhrystone 2.1 MIPS performance at 33 MHz
• Commercial temperature range (-40C to +85C) operation at 33 MHz and 2.7V to 3.6V
• 256 Kbytes of FLASH EEPROM accessible by the M210 core in one clock cycle
• 32 Kbytes of SRAM for data or program storage with battery backup power input
• Second Generation FLASH for M·CORE (SGFM) technology with simplified programming algorithms and multi-level security
• External bus interface with 32 data lines, 4 chip selects, 23 address lines, and 4 byte enable strobes (total address space of 32 Mbytes)
• Separate software watchdog timer and dual periodic interrupt timers with independent counters
• Interrupt controller with 40 sources, each with programmable priority and support for both normal and fast M·CORE interrupt types
• Low voltage detection (LVD) with reset/interrupt action
• Master/slave mode 8-bit Serial Peripheral Interface (SPI) with mode fault detection capacity
• Dual Serial Communication Interfaces (SCI) with independent baud rate generators
• 8-channel, 10-bit Queued Analog to Digital Converter (QADC) with dual conversion command queues, two external trigger inputs, and support for 16 externally multiplexed channels
• Dual 4-channel capture/compare timers with independent counters and Pulse Width Modulation (PWM)capability
• 8-bit edge detect I/O port with interrupt capability
• 100-pin LQFP (14mm x 14mm x 1.4mm) supports operation in singles-chip mode only with up to 67 bidirectional discrete I/O pins
• 144-pin LQFP (20mm x 20 mm x 1.4 mm) or 196-pin MAPBGA (15mm x 15mm x 1.6mm) for applications requiring an external bus or up to 104 bidirectional discrete I/O pins in single-chip mode