Integrated S12 Based Relay Driver with LIN

文件：2.57445 Mbytes 页数：345 Pages

FREESCALEFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

Integrated S12 Based Relay Driver with LIN

文件：2.57445 Mbytes 页数：345 Pages

FREESCALEFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

MagniV S12 Relay Driver, 2x HS/ LS, I-sense, 16-bit MCU, 6KB RAM, 64KB Flash, LIN, QFP-EP 48

The MM912G634 (48 kB) and MM912H634 (64 kB) are integrated single package solutions that integrate an HCS12 MCU with a SMARTMOS® analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application-specific functions, including a LIN transceiver.\nYour cu CPU Core• 16-Bit S12 CPU, 64/48/32 kByte Program Flash\n• 4/2/0 kByte Data Flash\n• 6/2/2 kBytes of RAM\n• Background debug (BDM) & debug module (DBG)\n• 16-Bit, 4 Channel - Timer Module (TIM16B4C)\n• Die to Die bus interface for transparent memory mapping;

恩XP

MagniV S12 Relay Driver, 2x HS/ LS, I-sense, 16-bit MCU, 6KB RAM, 64KB Flash, LIN, QFP-EP 48

The MM912G634 (48 kB) and MM912H634 (64 kB) are integrated single package solutions that integrate an HCS12 MCU with a SMARTMOS® analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application-specific functions, including a LIN transceiver.\nYour cu CPU Core• 16-Bit S12 CPU, 64/48/32 kByte Program Flash\n• 4/2/0 kByte Data Flash\n• 6/2/2 kBytes of RAM\n• Background debug (BDM) & debug module (DBG)\n• 16-Bit, 4 Channel - Timer Module (TIM16B4C)\n• Die to Die bus interface for transparent memory mapping;

恩XP

MagniV S12 Relay Driver, 2x HS/ LS, I-sense, 16-bit MCU, 6KB RAM, 64KB Flash, LIN, QFP-EP 48

The MM912G634 (48 kB) and MM912H634 (64 kB) are integrated single package solutions that integrate an HCS12 MCU with a SMARTMOS® analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application-specific functions, including a LIN transceiver.\nYour cu CPU Core• 16-Bit S12 CPU, 64/48/32 kByte Program Flash\n• 4/2/0 kByte Data Flash\n• 6/2/2 kBytes of RAM\n• Background debug (BDM) & debug module (DBG)\n• 16-Bit, 4 Channel - Timer Module (TIM16B4C)\n• Die to Die bus interface for transparent memory mapping;

恩XP