MM912F634DV2AP数据手册恩XP中文资料规格书

描述 Description

The MM912G634 (48 kB) and MM912H634 (64 kB) are integrated single package solutions that integrate an HCS12 MCU with a SMARTMOS® analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application-specific functions, including a LIN transceiver.
Your customer benefits include:
Integrated MCU and analog features in the same package solution
A full LIN solution
Easy control of high-current motors using relays and current sense features
Reduced space, resulting in enhanced reliability
Full protection for output stages
Economical multifunction solution with few components
Low-power mode flexibility
Reverse-battery-protected voltage sense
View internal diagram

特性 Features

CPU Core
• 16-Bit S12 CPU, 64/48/32 kByte Program Flash
• 4/2/0 kByte Data Flash
• 6/2/2 kBytes of RAM
• Background debug (BDM) & debug module (DBG)
• 16-Bit, 4 Channel - Timer Module (TIM16B4C)
• Die to Die bus interface for transparent memory mapping