ML63193-XXXTC数据手册OKI中文资料规格书

描述 Description

GENERAL DESCRIPTION
The ML63193 is CMOS 4-bit microcontroller with built-in 1024-dot matrix LCD drivers (64 SEG. × 16 COM.), and operates at 0.9 V (Min). The ML63193 is suitable for applications as games, toys, watches, remote controller, etc. Which are provided with a LCD display.
The ML63193 is an M6318x series mask ROM-version product of OLMS-63K family, which employs Oki’s
original CPU core nX-4/250.FEATURES
• Extensive instruction set
408 instructions:
Transfer, rotate, increment/decrement, arithmetic operations, compare, logic operations, mask operations, bit operations, ROM table reference, stack operations, flag operations, jump, conditional branch, call/return, control
• Wide variety of addressing modes
  Indirect addressing mode for 4 types of data memory with current bank register, extra bank register, HL register and XY register Data memory bank internal direct addressing mode
• Processing speed
2 clocks per machine cycle, with most instructions executed in 1 machine cycle
Minimum instruction execution time : 61 µs (@ 32.768 kHz system clock)
                                                : 1 µs (@ 2 MHz system clock)
• Clock generation circuit
Low-speed clock : Crystal oscillation or RC oscillation selected with mask option (30 kHz to 80 kHz)
High-speed clock : Ceramic oscillation or RC oscillation selected with software (2 MHz max)
• Program memory space
64 K words
Basic instruction length is 16 bits/1word.
• Data memory space
2048 nibbles
• Stack level
Call stack level : 16 levels
Register stack level : 16 levels

特性 Features

• Extensive instruction set
408 instructions:
Transfer, rotate, increment/decrement, arithmetic operations, compare, logic operations, mask operations, bit operations, ROM table reference, stack operations, flag operations, jump, conditional branch, call/return, control
• Wide variety of addressing modes
  Indirect addressing mode for 4 types of data memory with current bank register, extra bank register, HL register and XY register Data memory bank internal direct addressing mode
• Processing speed
2 clocks per machine cycle, with most instructions executed in 1 machine cycle
Minimum instruction execution time : 61 µs (@ 32.768 kHz system clock)
                                                : 1 µs (@ 2 MHz system clock)
• Clock generation circuit
Low-speed clock : Crystal oscillation or RC oscillation selected with mask option (30 kHz to 80 kHz)
High-speed clock : Ceramic oscillation or RC oscillation selected with software (2 MHz max)
• Program memory space
64 K words
Basic instruction length is 16 bits/1word.
• Data memory space
2048 nibbles
• Stack level
Call stack level : 16 levels
Register stack level : 16 levels