ML60852A数据手册OKI中文资料规格书

描述 Description

GENERAL DESCRIPTION
The ML60852A is a general purpose Universal Serial Bus (USB) device controller.
The ML60852A provides a USB serial interface engine, USB transceiver, FIFOs, control/status registers, application interface circuit, and oscillation circuit thereby easily realizing a USB system. The ML60852A supports four types of data transfer such as control transfer, bulk transfer, interrupt transfer and isochronous transfer, and also supports five or six endpoints.FEATURES
• USB1.1 compliant
• Supports full-speed (12 Mbps).
• Supports four types of transfer; control transfer, bulk transfer, interrupt transfer, and isochronous transfer.
• Endpoints: 5 to 6 endpoints
   Control EP 1
   Bulk/interrupt EP 3
   Isochronous/bulk/interrupt EP 1 or 2
• Built-in FIFO for data storage
• A two-layer configuration of FIFO for each of EP1, EP2, EP4, and EP5
• 8/16 bit DMA supported (EP1, EP2, EP4, and EP5)
• Intelligent Serial Interface Engine (SIE)
• Supports bus-powered device.
   The suspend condition is automatically detected and the low-power mode is activated. Normal operation is automatically restarted when the resume condition is detected.
• Built-in USB transceiver circuit
• Ta = -20 to +80 °C
• VCC=3.0 to 3.6 V
• Interface with 5 V circuit is possible. (Input: 5 V tolerant, output: TTL)
• Built-in 12 MHz /6 MHz oscillation circuit
• Package options:
   44-pin plastic TQFP
   56-pin plastic LGA

特性 Features

• USB1.1 compliant
• Supports full-speed (12 Mbps).
• Supports four types of transfer; control transfer, bulk transfer, interrupt transfer, and isochronous transfer.
• Endpoints: 5 to 6 endpoints
   Control EP 1
   Bulk/interrupt EP 3
   Isochronous/bulk/interrupt EP 1 or 2
• Built-in FIFO for data storage
• A two-layer configuration of FIFO for each of EP1, EP2, EP4, and EP5
• 8/16 bit DMA supported (EP1, EP2, EP4, and EP5)
• Intelligent Serial Interface Engine (SIE)
• Supports bus-powered device.
   The suspend condition is automatically detected and the low-power mode is activated. Normal operation is automatically restarted when the resume condition is detected.
• Built-in USB transceiver circuit
• Ta = -20 to +80 °C
• VCC=3.0 to 3.6 V
• Interface with 5 V circuit is possible. (Input: 5 V tolerant, output: TTL)
• Built-in 12 MHz /6 MHz oscillation circuit
• Package options:
   44-pin plastic TQFP
   56-pin plastic LGA