Recording and Playback LSI with Built-in 2-Bit ADPCM2 Supported FIFO

GENERAL DESCRIPTION The ML2302 is a recording and playback LSI with built-in FIFO memories for buffering. It employs the new 2-bit ADPCM2 algorithm in addition to conventional 4-bit OKIADPCM and 4-bit OKIADPCM2 algorithms. The ML2302 operates at 2.7 to 3.6 V and supports a variety of applications

文件：199.74 Kbytes 页数：24 Pages

OKIOki Electric Cable Co.,Ltd

冲电线日本冲电线株式会社

20V(D-S) N-Channel Enhancement Mode Power MOS FET

文件：387.35 Kbytes 页数：6 Pages

MORESEMI

摩矽半导体

20V(D-S) N-Channel Enhancement Mode Power MOS FET

文件：352.41 Kbytes 页数：6 Pages

MORESEMI

摩矽半导体

20V(D-S) N-Channel Enhancement Mode Power MOS FET

文件：387.69 Kbytes 页数：6 Pages

MORESEMI

摩矽半导体